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Efficeon TM8000 microprocessor family
Date: Thursday October 16, 2003
Category: CPU / Processors
Manufacturer Link: Transmeta
Transmeta Introduces the Efficeon TM8000 Family for a New Era of High-Performance, Efficient Computing
 

Transmeta Introduces the Efficeon TM8000 Family for a New Era of High-Performance, Efficient Computing

Efficeon Provides Significant Jump in Performance over Crusoe while Maintaining Leadership in Energy Efficiency

Transmeta Corporation, the leader in efficient computing, today introduced the Efficeon TM8000 microprocessor family, establishing a new standard for high-performance, highly integrated, low-power x86-compatible computing. The Efficeon processors take efficient computing to a new level, with major innovations in Transmeta's revolutionary but proven hardware and software architecture, increased on-chip integration and new high performance interfaces.

Aimed at ultra-portable and mainstream notebook computers, as well as innovative news classes of devices such as tablet PCs, ultra-personal computers, silent desktop computers, blade servers, thin clients and embedded systems, the Efficeon processor family will be competitive with, or outperform competing microprocessors operating within critical thermal limits such as the 7W limit for typical fanless notebook designs. Systems based on the processor are expected to begin shipping in the fourth quarter.

"The Efficeon processor gives system builders worldwide the capacity to design in added value, functionality, security, comfort, reliability and cost savings," said Dr. Matthew R. Perry, president and CEO, Transmeta Corporation. "At the same time, it delivers exceptional performance for a wide variety of demanding applications, from business productivity to multimedia."

High Performance Engine and Interfaces

Efficeon is a high-performance, low-power x86-compatible processor, based upon a new silicon microarchitecture and also a redesigned version of Transmeta's Code Morphing(R) Software. The microarchitecture is based on a 256-bit VLIW (Very Long Instruction Word) processor that can issue up to 8 internal instructions per clock cycle. When combined with the new Efficeon Code Morphing Software, it provides full compatibility with modern x86 software, including MMX, SSE and SSE2 multimedia instructions.

Efficeon features a number of new high performance interfaces integrated into the same chip as the processor, eliminating the need for a separate Northbridge chip. Efficeon includes a high speed AGP-4X graphics interface that enables the use of industry standard high performance AGP graphics solutions. Efficeon includes a high speed DDR-400 (Double Data Rate SDRAM at 400 Megatransfers/second) memory interface, with ECC (Error Correcting Code) as an option. Efficeon includes a high performance HyperTransport interconnect for connecting to the rest of the system. Efficeon's HyperTransport interface can send data at up to 1.6 GBytes/second aggregate, which is up to 12 times faster than the I/O throughput of Crusoe's PCI interface. Efficeon also includes a high speed LPC (Low Pin Count) bus interface for communicating with the latest generation of FLASH memory.

With integrated on-chip Northbridge core logic, the Efficeon TM8000 family reduces chip count and decreases the size and cost of the PC board, enabling innovative, smaller form factor designs. Transmeta and NVIDIA have been working jointly together on small package solutions. The Efficeon TM8620 21x21mm small package combined with NVIDIA's 22x22mm nForce3 Go 120 Southbridge will allow the combination of CPU, Northbridge and Southbridge to fit in a space nearly four times smaller than that of its nearest competitor. The standard model Efficeon TM8600 processor will be offered in a 29x29mm package, also smaller than the competitive processors.

Initially, Efficeon silicon will be manufactured for Transmeta by TSMC in Taiwan, in TMSC's 0.13 micron (130 nanometer) CMOS technology at clock speeds starting at 1 GHz and above. Starting in the second half of 2004, Efficeon silicon will also be manufactured for Transmeta at Fujitsu's Akiruno Technology Center near Tokyo, Japan, at speeds up to 2 GHz, using Fujitsu's 90 nm CMOS process.

"Efficeon represents a major leap forward in CPU performance for Transmeta," said David R. Ditzel, co-founder, vice-chairman and chief technology officer of Transmeta. "Efficeon's 256-bit VLIW engine and new Code Morphing Software represents a major step forward in computer architecture, and will help bring Transmeta into new markets."

New Code Morphing(R) Software for Improved Responsiveness and Energy Management

The Efficeon TM8000 family continues to build on Transmeta's leadership in energy efficiency. A new generation of the company's unique Code Morphing Software not only improves responsiveness, but further reduces power consumption by fully leveraging the new 256-bit VLIW engine. Efficeon features Transmeta's LongRun(R) power and thermal management technology, which continuously adjusts operating frequency and voltage to match application workload.

The Transmeta Efficeon processor is designed to provide power efficiency, design flexibility, performance-on-demand and low cost to meet the need of the next generation of mobile, wireless, and embedded devices. It includes three new high performance bus interfaces: an on-chip HyperTransport(TM) bus interface for increased input/output efficiency, an on-chip DDR-400 memory interface, and an on-chip AGP-4X graphics interface for high performance graphics solutions. These new interfaces allow Efficeon to achieve more work per clock, which results in greater energy efficiency and longer battery life for mobile computer users. The Transmeta Efficeon processor's dynamic LongRun(R) power management features and integrated architecture are designed to give system designers and marketers a wide range of choices in creating products that deliver added value, functionality, security, comfort, reliability, and cost-savings to end users.

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